The design of a typical power supply circuit may be characterized as a voltage regulation problem. Experienced circuit designers recognize, however, that the task of designing an efficient power supply circuit requires that the issues of current measurement and current control be considered. One of the most important reasons for monitoring current in a power supply circuit is to be able to provide current limit or over-load protection for the power supply circuit.
In prior art circuits the current limit function is normally placed inside power integrated circuit (IC) chips in order to save external board area and to reduce the cost of manufacturing the power supply circuit. In the case of switching regulators (which include power switches inside the IC chip) the over-load protection is usually implemented inside the IC chip by sensing the current through power switching and then comparing the sensed signal with a reference signal to determine whether the power supply is in an over-load condition.
Because components outside of the IC chip have no control of the current limit, it is a very important and challenging task to be able to keep the accuracy of over-load protection during variations of operating conditions such as process, temperature and over-drive voltage variations. It would be desirable to have a current sense and current limit circuit that could guarantee an overall performance of over-load protection under variable operating conditions.
FIG. 1 illustrates a schematic diagram of a prior art current sense and current limit circuit 100. Circuit 100 comprises a level shifter 110 having an output connected to the input of a driver 120 as shown in FIG. 1. Level shifter 110 receives an input signal from an IN node. Level shifter 110 and driver 120 both receive a CBOOT signal from a CBOOT node. Level shifter 110 and driver 120 both receive an SW signal from a SW node.
The output of driver 120 is connected to the gate of an n-channel transistor 130 (designated M1) and to the gate of an n-channel transistor 140 (designated M2). Transistor 130 M1 is a high-side Power Field Effect Transistor (FET). Transistor 130 M1 is sometimes referred to as power transistor 130 M1. Transistor 140 M2 is a sense Field Effect Transistor (FET) that has a much smaller size than Transistor 130 M1. For example, a typical width of transistor 130 M1 is ten thousand microns (10K μ) and a typical width of transistor 140 M2 is ten microns (10μ). Resistor 150 (designated R1) is a current sense resistor. Resistor 160 (designated R3) is a current reference resistor. Typical values of resistance for resistor 150 R1 and for resistor 160 R3 are in the range of one thousand ohms (1 kΩ) to ten thousand ohms (10 kΩ).
As shown in FIG. 1, the drain of transistor 130 M1 is connected to a first end of current sense resistor 150 R1 and to a first end of current reference resistor 160 R3 and to the input voltage node VIN that supplies the input voltage VIN. The source of transistor 130 M1 is connected to the SW node. The drain of transistor 140 M2 is connected to a second end of the current sense resistor 150 R1 and to a sense “drain to source voltage” node (designated “VDS sen” in FIG. 1). The source of transistor 140 M2 is connected to the SW node.
The second end of the current reference resistor R3 is connected to a reference “drain to source voltage” node (designated “VDS ref” in FIG. 1). The second end of the current reference resistor R3 is also connected to a first side of a current source 170 (designated I1). The second side of the current source 170 I1 is connected to ground.
When the input signal IN is high, transistor 130 M1 and transistor 140 M2 are fully turned on and both of them are operating in the triode region. The voltage drop across the drain and source of transistor 130 M1 (designated VDS1) is given by the expression:VDS1≅IORDSON1  Eq. (1)
In Equation (1) the expression IO represents the load current and the expression RDSON1 represents the drain to source resistance of transistor 130 M1.
The voltage drop VR1 across the current sense resistor 150 R1 is given by the expressions:VR1=VIN−VVDS sen  Eq. (2)
                              V                      R            ⁢                                                  ⁢            1                          =                              V                          DS              ⁢                                                          ⁢              1                                ⁢                                          ⁢                                    R              ⁢                                                          ⁢              1                                                      R                ⁢                                                                  ⁢                1                            +                              R                                  DSON                  ⁢                                                                          ⁢                  2                                                                                        Eq        .                                  ⁢                  (          3          )                    
                              V                      R            ⁢                                                  ⁢            1                          =                              I            O                    ⁢                                          ⁢                      R                          DSON              ⁢                                                          ⁢              1                                ⁢                                    R              ⁢                                                          ⁢              1                                                      R                ⁢                                                                  ⁢                1                            +                              R                                  DSON                  ⁢                                                                          ⁢                  2                                                                                        Eq        .                                  ⁢                  (          4          )                    
The expression VVDSsen represents the reference drain to source voltage on the drain of transistor 140 M2. The expression VDS1 represents the drain to source voltage of transistor 130 M1. The expression RDSON2 represents the drain to source resistance of transistor 140 M2. From Equation (4) one can see that the voltage drop VR1 is proportional to the value of the load current IO.
The reference current passes through current reference resistor 160 R3. The current reference resistor 160 R3 sets the current limit trip value. When the voltage drop across the current sense resistor 150 R1 is greater than the voltage drop across the current reference resistor R3, then the voltage on the VDSsen node will be lower than the voltage on the VDSref node. The voltage on the VDSsen node and the voltage on the VDSref node are provided to the inputs of a current limit comparator circuit (not shown in FIG. 1). When the voltage on the VDSsen node is lower than the voltage on the VDSref node then the current limit comparator will be triggered and the output of the current limit comparator will go high to flag this fault condition.
The current limit will be tripped when the voltage drop across the current sense resistor 150 R1 is equal to the voltage drop across the current reference resistor 160 R3. This equality condition is expressed as:VR1=VR3  Eq. (5)
The equality condition leads to the result:
                                          I            O                    ⁢                                          ⁢                      R                          DSON              ⁢                                                          ⁢              1                                ⁢                                    R              ⁢                                                          ⁢              1                                                      R                ⁢                                                                  ⁢                1                            +                              R                                  DSON                  ⁢                                                                          ⁢                  2                                                                    =                              I            REF                    ⁢                                          ⁢          R          ⁢                                          ⁢          3                                    Eq        .                                  ⁢                  (          6          )                    
The limit value IO(LIMIT) of the load current IO is:
                              I                      O            ⁢                                                  ⁢                          (              LIMIT              )                                      =                              I            REF                    ⁢                                          ⁢                                    R              ⁢                                                          ⁢              3                                      R              ⁢                                                          ⁢              1                                ⁢                                          ⁢                                    (                                                R                  ⁢                                                                          ⁢                  1                                +                                  R                                      DSON                    ⁢                                                                                  ⁢                    2                                                              )                                      R                              DSON                ⁢                                                                  ⁢                1                                                                        Eq        .                                  ⁢                  (          7          )                    
From Equation (7) it would seem that in order to guarantee that the current trip value keeps constant over input voltage (VIN) variations, temperature variations, and process variations, then the current sense resistor 150 R1, and the current reference resistor 160 R3, and the resistors RDSON1 and RDSON2 should be the same type of resistors and match over a wide range (assuming that the reference current IREF has a zero temperature coefficient).
In reality this requirement cannot be met because all of the underlying requirements cannot be simultaneously satisfied. The mismatch of the resistors causes the current limit trip value to vary widely over the input voltage (VIN) variations, and the temperature variations, and the process variations.
FIG. 2 illustrates simulation results for the prior art current sense and current limit circuit 100 over temperature for a range of different over-drive voltages for an ideal current limit of four amperes (4.0 A). As shown in FIG. 2, the temperature ranges from minus forty degrees Celsius (−40° C.) to a positive one hundred degrees Celsius (+140° C.). The current range is from three amperes (3.0 A) to six amperes (6.0 A).
The variation of the current limit trip value as a function of temperature for an overdrive voltage of four volts (4.0 V) is shown in curve 210. The variation of the current limit trip value as a function of temperature for an overdrive voltage of five volts (5.0 V) is shown in curve 220. The variation of the current limit trip value as a function of temperature for an overdrive voltage of six volts (6.0 V) is shown in curve 230.
The results illustrated in FIG. 2 show that there is a variation of over sixty percent (60%) in the current limit trip value. This is even without the process variations being considered. It would be very difficult for a designer of power supply circuitry to design an efficient power supply circuit when faced with such wide variations in the current limit trip value.
Therefore, there is a need in the art for a system and method that is capable of solving the poor performance problems that are exhibited by prior art devices. In particular, there is a need in the art for a system and method for providing an efficient process, temperature and over-drive invariant over-current protection circuit.
The present invention provides an over-current protection circuit that comprises a power transistor, a sense transistor, at least one current sense transistor and at least one current reference transistor. The over-current protection circuit provides a current limit trip value that remains substantially constant over temperature variations, and over-drive voltage variations, and process variations.
Before undertaking the Detailed Description of the Invention below, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or,” is inclusive, meaning and/or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like.
Definitions for certain words and phrases are provided throughout this patent document, those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior uses, as well as to future uses, of such defined words and phrases.